package CommSub

import chisel3._
import chisel3.util._

class HBMBlackBox extends BlackBox{
    val io = IO(new Bundle{
        val HBM_REF_CLK_0           = Input(Clock())
        val HBM_REF_CLK_1           = Input(Clock())

        val AXI_00_ACLK             = Input(Clock())  
        val AXI_00_ARESET_N         = Input(Bool())
        val AXI_00_ARADDR           = Input(UInt(33.W))
        val AXI_00_ARBURST          = Input(UInt(2.W))
        val AXI_00_ARID             = Input(UInt(6.W))
        val AXI_00_ARLEN            = Input(UInt(4.W))
        val AXI_00_ARSIZE           = Input(UInt(3.W))
        val AXI_00_ARVALID          = Input(UInt(1.W))
        val AXI_00_ARREADY          = Output(UInt(1.W))
        val AXI_00_AWADDR           = Input(UInt(33.W))
        val AXI_00_AWBURST          = Input(UInt(2.W))
        val AXI_00_AWID             = Input(UInt(6.W))
        val AXI_00_AWLEN            = Input(UInt(4.W))
        val AXI_00_AWSIZE           = Input(UInt(3.W))
        val AXI_00_AWVALID          = Input(UInt(1.W))
        val AXI_00_AWREADY          = Output(UInt(1.W))
        val AXI_00_WDATA            = Input(UInt(256.W))
        val AXI_00_WLAST            = Input(UInt(1.W))
        val AXI_00_WSTRB            = Input(UInt(32.W))
        val AXI_00_WVALID           = Input(UInt(1.W))
        val AXI_00_WREADY           = Output(UInt(1.W))
        val AXI_00_RDATA            = Output(UInt(256.W))
        val AXI_00_RID              = Output(UInt(6.W))
        val AXI_00_RLAST            = Output(UInt(1.W))
        val AXI_00_RRESP            = Output(UInt(2.W))
        val AXI_00_RVALID           = Output(UInt(1.W))
        val AXI_00_RREADY           = Input(UInt(1.W))
        val AXI_00_BID              = Output(UInt(6.W))
        val AXI_00_BRESP            = Output(UInt(2.W))
        val AXI_00_BVALID           = Output(UInt(1.W))
        val AXI_00_BREADY           = Input(UInt(1.W))
        val AXI_00_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_00_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_01_ACLK             = Input(Clock())  
        val AXI_01_ARESET_N         = Input(Bool())
        val AXI_01_ARADDR           = Input(UInt(33.W))
        val AXI_01_ARBURST          = Input(UInt(2.W))
        val AXI_01_ARID             = Input(UInt(6.W))
        val AXI_01_ARLEN            = Input(UInt(4.W))
        val AXI_01_ARSIZE           = Input(UInt(3.W))
        val AXI_01_ARVALID          = Input(UInt(1.W))
        val AXI_01_ARREADY          = Output(UInt(1.W))
        val AXI_01_AWADDR           = Input(UInt(33.W))
        val AXI_01_AWBURST          = Input(UInt(2.W))
        val AXI_01_AWID             = Input(UInt(6.W))
        val AXI_01_AWLEN            = Input(UInt(4.W))
        val AXI_01_AWSIZE           = Input(UInt(3.W))
        val AXI_01_AWVALID          = Input(UInt(1.W))
        val AXI_01_AWREADY          = Output(UInt(1.W))
        val AXI_01_WDATA            = Input(UInt(256.W))
        val AXI_01_WLAST            = Input(UInt(1.W))
        val AXI_01_WSTRB            = Input(UInt(32.W))
        val AXI_01_WVALID           = Input(UInt(1.W))
        val AXI_01_WREADY           = Output(UInt(1.W))
        val AXI_01_RDATA            = Output(UInt(256.W))
        val AXI_01_RID              = Output(UInt(6.W))
        val AXI_01_RLAST            = Output(UInt(1.W))
        val AXI_01_RRESP            = Output(UInt(2.W))
        val AXI_01_RVALID           = Output(UInt(1.W))
        val AXI_01_RREADY           = Input(UInt(1.W))
        val AXI_01_BID              = Output(UInt(6.W))
        val AXI_01_BRESP            = Output(UInt(2.W))
        val AXI_01_BVALID           = Output(UInt(1.W))
        val AXI_01_BREADY           = Input(UInt(1.W))
        val AXI_01_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_01_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_02_ACLK             = Input(Clock())  
        val AXI_02_ARESET_N         = Input(Bool())
        val AXI_02_ARADDR           = Input(UInt(33.W))
        val AXI_02_ARBURST          = Input(UInt(2.W))
        val AXI_02_ARID             = Input(UInt(6.W))
        val AXI_02_ARLEN            = Input(UInt(4.W))
        val AXI_02_ARSIZE           = Input(UInt(3.W))
        val AXI_02_ARVALID          = Input(UInt(1.W))
        val AXI_02_ARREADY          = Output(UInt(1.W))
        val AXI_02_AWADDR           = Input(UInt(33.W))
        val AXI_02_AWBURST          = Input(UInt(2.W))
        val AXI_02_AWID             = Input(UInt(6.W))
        val AXI_02_AWLEN            = Input(UInt(4.W))
        val AXI_02_AWSIZE           = Input(UInt(3.W))
        val AXI_02_AWVALID          = Input(UInt(1.W))
        val AXI_02_AWREADY          = Output(UInt(1.W))
        val AXI_02_WDATA            = Input(UInt(256.W))
        val AXI_02_WLAST            = Input(UInt(1.W))
        val AXI_02_WSTRB            = Input(UInt(32.W))
        val AXI_02_WVALID           = Input(UInt(1.W))
        val AXI_02_WREADY           = Output(UInt(1.W))
        val AXI_02_RDATA            = Output(UInt(256.W))
        val AXI_02_RID              = Output(UInt(6.W))
        val AXI_02_RLAST            = Output(UInt(1.W))
        val AXI_02_RRESP            = Output(UInt(2.W))
        val AXI_02_RVALID           = Output(UInt(1.W))
        val AXI_02_RREADY           = Input(UInt(1.W))
        val AXI_02_BID              = Output(UInt(6.W))
        val AXI_02_BRESP            = Output(UInt(2.W))
        val AXI_02_BVALID           = Output(UInt(1.W))
        val AXI_02_BREADY           = Input(UInt(1.W))
        val AXI_02_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_02_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_03_ACLK             = Input(Clock())  
        val AXI_03_ARESET_N         = Input(Bool())
        val AXI_03_ARADDR           = Input(UInt(33.W))
        val AXI_03_ARBURST          = Input(UInt(2.W))
        val AXI_03_ARID             = Input(UInt(6.W))
        val AXI_03_ARLEN            = Input(UInt(4.W))
        val AXI_03_ARSIZE           = Input(UInt(3.W))
        val AXI_03_ARVALID          = Input(UInt(1.W))
        val AXI_03_ARREADY          = Output(UInt(1.W))
        val AXI_03_AWADDR           = Input(UInt(33.W))
        val AXI_03_AWBURST          = Input(UInt(2.W))
        val AXI_03_AWID             = Input(UInt(6.W))
        val AXI_03_AWLEN            = Input(UInt(4.W))
        val AXI_03_AWSIZE           = Input(UInt(3.W))
        val AXI_03_AWVALID          = Input(UInt(1.W))
        val AXI_03_AWREADY          = Output(UInt(1.W))
        val AXI_03_WDATA            = Input(UInt(256.W))
        val AXI_03_WLAST            = Input(UInt(1.W))
        val AXI_03_WSTRB            = Input(UInt(32.W))
        val AXI_03_WVALID           = Input(UInt(1.W))
        val AXI_03_WREADY           = Output(UInt(1.W))
        val AXI_03_RDATA            = Output(UInt(256.W))
        val AXI_03_RID              = Output(UInt(6.W))
        val AXI_03_RLAST            = Output(UInt(1.W))
        val AXI_03_RRESP            = Output(UInt(2.W))
        val AXI_03_RVALID           = Output(UInt(1.W))
        val AXI_03_RREADY           = Input(UInt(1.W))
        val AXI_03_BID              = Output(UInt(6.W))
        val AXI_03_BRESP            = Output(UInt(2.W))
        val AXI_03_BVALID           = Output(UInt(1.W))
        val AXI_03_BREADY           = Input(UInt(1.W))
        val AXI_03_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_03_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_04_ACLK             = Input(Clock())  
        val AXI_04_ARESET_N         = Input(Bool())
        val AXI_04_ARADDR           = Input(UInt(33.W))
        val AXI_04_ARBURST          = Input(UInt(2.W))
        val AXI_04_ARID             = Input(UInt(6.W))
        val AXI_04_ARLEN            = Input(UInt(4.W))
        val AXI_04_ARSIZE           = Input(UInt(3.W))
        val AXI_04_ARVALID          = Input(UInt(1.W))
        val AXI_04_ARREADY          = Output(UInt(1.W))
        val AXI_04_AWADDR           = Input(UInt(33.W))
        val AXI_04_AWBURST          = Input(UInt(2.W))
        val AXI_04_AWID             = Input(UInt(6.W))
        val AXI_04_AWLEN            = Input(UInt(4.W))
        val AXI_04_AWSIZE           = Input(UInt(3.W))
        val AXI_04_AWVALID          = Input(UInt(1.W))
        val AXI_04_AWREADY          = Output(UInt(1.W))
        val AXI_04_WDATA            = Input(UInt(256.W))
        val AXI_04_WLAST            = Input(UInt(1.W))
        val AXI_04_WSTRB            = Input(UInt(32.W))
        val AXI_04_WVALID           = Input(UInt(1.W))
        val AXI_04_WREADY           = Output(UInt(1.W))
        val AXI_04_RDATA            = Output(UInt(256.W))
        val AXI_04_RID              = Output(UInt(6.W))
        val AXI_04_RLAST            = Output(UInt(1.W))
        val AXI_04_RRESP            = Output(UInt(2.W))
        val AXI_04_RVALID           = Output(UInt(1.W))
        val AXI_04_RREADY           = Input(UInt(1.W))
        val AXI_04_BID              = Output(UInt(6.W))
        val AXI_04_BRESP            = Output(UInt(2.W))
        val AXI_04_BVALID           = Output(UInt(1.W))
        val AXI_04_BREADY           = Input(UInt(1.W))
        val AXI_04_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_04_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_05_ACLK             = Input(Clock())  
        val AXI_05_ARESET_N         = Input(Bool())
        val AXI_05_ARADDR           = Input(UInt(33.W))
        val AXI_05_ARBURST          = Input(UInt(2.W))
        val AXI_05_ARID             = Input(UInt(6.W))
        val AXI_05_ARLEN            = Input(UInt(4.W))
        val AXI_05_ARSIZE           = Input(UInt(3.W))
        val AXI_05_ARVALID          = Input(UInt(1.W))
        val AXI_05_ARREADY          = Output(UInt(1.W))
        val AXI_05_AWADDR           = Input(UInt(33.W))
        val AXI_05_AWBURST          = Input(UInt(2.W))
        val AXI_05_AWID             = Input(UInt(6.W))
        val AXI_05_AWLEN            = Input(UInt(4.W))
        val AXI_05_AWSIZE           = Input(UInt(3.W))
        val AXI_05_AWVALID          = Input(UInt(1.W))
        val AXI_05_AWREADY          = Output(UInt(1.W))
        val AXI_05_WDATA            = Input(UInt(256.W))
        val AXI_05_WLAST            = Input(UInt(1.W))
        val AXI_05_WSTRB            = Input(UInt(32.W))
        val AXI_05_WVALID           = Input(UInt(1.W))
        val AXI_05_WREADY           = Output(UInt(1.W))
        val AXI_05_RDATA            = Output(UInt(256.W))
        val AXI_05_RID              = Output(UInt(6.W))
        val AXI_05_RLAST            = Output(UInt(1.W))
        val AXI_05_RRESP            = Output(UInt(2.W))
        val AXI_05_RVALID           = Output(UInt(1.W))
        val AXI_05_RREADY           = Input(UInt(1.W))
        val AXI_05_BID              = Output(UInt(6.W))
        val AXI_05_BRESP            = Output(UInt(2.W))
        val AXI_05_BVALID           = Output(UInt(1.W))
        val AXI_05_BREADY           = Input(UInt(1.W))
        val AXI_05_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_05_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_06_ACLK             = Input(Clock())  
        val AXI_06_ARESET_N         = Input(Bool())
        val AXI_06_ARADDR           = Input(UInt(33.W))
        val AXI_06_ARBURST          = Input(UInt(2.W))
        val AXI_06_ARID             = Input(UInt(6.W))
        val AXI_06_ARLEN            = Input(UInt(4.W))
        val AXI_06_ARSIZE           = Input(UInt(3.W))
        val AXI_06_ARVALID          = Input(UInt(1.W))
        val AXI_06_ARREADY          = Output(UInt(1.W))
        val AXI_06_AWADDR           = Input(UInt(33.W))
        val AXI_06_AWBURST          = Input(UInt(2.W))
        val AXI_06_AWID             = Input(UInt(6.W))
        val AXI_06_AWLEN            = Input(UInt(4.W))
        val AXI_06_AWSIZE           = Input(UInt(3.W))
        val AXI_06_AWVALID          = Input(UInt(1.W))
        val AXI_06_AWREADY          = Output(UInt(1.W))
        val AXI_06_WDATA            = Input(UInt(256.W))
        val AXI_06_WLAST            = Input(UInt(1.W))
        val AXI_06_WSTRB            = Input(UInt(32.W))
        val AXI_06_WVALID           = Input(UInt(1.W))
        val AXI_06_WREADY           = Output(UInt(1.W))
        val AXI_06_RDATA            = Output(UInt(256.W))
        val AXI_06_RID              = Output(UInt(6.W))
        val AXI_06_RLAST            = Output(UInt(1.W))
        val AXI_06_RRESP            = Output(UInt(2.W))
        val AXI_06_RVALID           = Output(UInt(1.W))
        val AXI_06_RREADY           = Input(UInt(1.W))
        val AXI_06_BID              = Output(UInt(6.W))
        val AXI_06_BRESP            = Output(UInt(2.W))
        val AXI_06_BVALID           = Output(UInt(1.W))
        val AXI_06_BREADY           = Input(UInt(1.W))
        val AXI_06_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_06_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_07_ACLK             = Input(Clock())  
        val AXI_07_ARESET_N         = Input(Bool())
        val AXI_07_ARADDR           = Input(UInt(33.W))
        val AXI_07_ARBURST          = Input(UInt(2.W))
        val AXI_07_ARID             = Input(UInt(6.W))
        val AXI_07_ARLEN            = Input(UInt(4.W))
        val AXI_07_ARSIZE           = Input(UInt(3.W))
        val AXI_07_ARVALID          = Input(UInt(1.W))
        val AXI_07_ARREADY          = Output(UInt(1.W))
        val AXI_07_AWADDR           = Input(UInt(33.W))
        val AXI_07_AWBURST          = Input(UInt(2.W))
        val AXI_07_AWID             = Input(UInt(6.W))
        val AXI_07_AWLEN            = Input(UInt(4.W))
        val AXI_07_AWSIZE           = Input(UInt(3.W))
        val AXI_07_AWVALID          = Input(UInt(1.W))
        val AXI_07_AWREADY          = Output(UInt(1.W))
        val AXI_07_WDATA            = Input(UInt(256.W))
        val AXI_07_WLAST            = Input(UInt(1.W))
        val AXI_07_WSTRB            = Input(UInt(32.W))
        val AXI_07_WVALID           = Input(UInt(1.W))
        val AXI_07_WREADY           = Output(UInt(1.W))
        val AXI_07_RDATA            = Output(UInt(256.W))
        val AXI_07_RID              = Output(UInt(6.W))
        val AXI_07_RLAST            = Output(UInt(1.W))
        val AXI_07_RRESP            = Output(UInt(2.W))
        val AXI_07_RVALID           = Output(UInt(1.W))
        val AXI_07_RREADY           = Input(UInt(1.W))
        val AXI_07_BID              = Output(UInt(6.W))
        val AXI_07_BRESP            = Output(UInt(2.W))
        val AXI_07_BVALID           = Output(UInt(1.W))
        val AXI_07_BREADY           = Input(UInt(1.W))
        val AXI_07_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_07_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_08_ACLK             = Input(Clock())  
        val AXI_08_ARESET_N         = Input(Bool())
        val AXI_08_ARADDR           = Input(UInt(33.W))
        val AXI_08_ARBURST          = Input(UInt(2.W))
        val AXI_08_ARID             = Input(UInt(6.W))
        val AXI_08_ARLEN            = Input(UInt(4.W))
        val AXI_08_ARSIZE           = Input(UInt(3.W))
        val AXI_08_ARVALID          = Input(UInt(1.W))
        val AXI_08_ARREADY          = Output(UInt(1.W))
        val AXI_08_AWADDR           = Input(UInt(33.W))
        val AXI_08_AWBURST          = Input(UInt(2.W))
        val AXI_08_AWID             = Input(UInt(6.W))
        val AXI_08_AWLEN            = Input(UInt(4.W))
        val AXI_08_AWSIZE           = Input(UInt(3.W))
        val AXI_08_AWVALID          = Input(UInt(1.W))
        val AXI_08_AWREADY          = Output(UInt(1.W))
        val AXI_08_WDATA            = Input(UInt(256.W))
        val AXI_08_WLAST            = Input(UInt(1.W))
        val AXI_08_WSTRB            = Input(UInt(32.W))
        val AXI_08_WVALID           = Input(UInt(1.W))
        val AXI_08_WREADY           = Output(UInt(1.W))
        val AXI_08_RDATA            = Output(UInt(256.W))
        val AXI_08_RID              = Output(UInt(6.W))
        val AXI_08_RLAST            = Output(UInt(1.W))
        val AXI_08_RRESP            = Output(UInt(2.W))
        val AXI_08_RVALID           = Output(UInt(1.W))
        val AXI_08_RREADY           = Input(UInt(1.W))
        val AXI_08_BID              = Output(UInt(6.W))
        val AXI_08_BRESP            = Output(UInt(2.W))
        val AXI_08_BVALID           = Output(UInt(1.W))
        val AXI_08_BREADY           = Input(UInt(1.W))
        val AXI_08_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_08_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_09_ACLK             = Input(Clock())  
        val AXI_09_ARESET_N         = Input(Bool())
        val AXI_09_ARADDR           = Input(UInt(33.W))
        val AXI_09_ARBURST          = Input(UInt(2.W))
        val AXI_09_ARID             = Input(UInt(6.W))
        val AXI_09_ARLEN            = Input(UInt(4.W))
        val AXI_09_ARSIZE           = Input(UInt(3.W))
        val AXI_09_ARVALID          = Input(UInt(1.W))
        val AXI_09_ARREADY          = Output(UInt(1.W))
        val AXI_09_AWADDR           = Input(UInt(33.W))
        val AXI_09_AWBURST          = Input(UInt(2.W))
        val AXI_09_AWID             = Input(UInt(6.W))
        val AXI_09_AWLEN            = Input(UInt(4.W))
        val AXI_09_AWSIZE           = Input(UInt(3.W))
        val AXI_09_AWVALID          = Input(UInt(1.W))
        val AXI_09_AWREADY          = Output(UInt(1.W))
        val AXI_09_WDATA            = Input(UInt(256.W))
        val AXI_09_WLAST            = Input(UInt(1.W))
        val AXI_09_WSTRB            = Input(UInt(32.W))
        val AXI_09_WVALID           = Input(UInt(1.W))
        val AXI_09_WREADY           = Output(UInt(1.W))
        val AXI_09_RDATA            = Output(UInt(256.W))
        val AXI_09_RID              = Output(UInt(6.W))
        val AXI_09_RLAST            = Output(UInt(1.W))
        val AXI_09_RRESP            = Output(UInt(2.W))
        val AXI_09_RVALID           = Output(UInt(1.W))
        val AXI_09_RREADY           = Input(UInt(1.W))
        val AXI_09_BID              = Output(UInt(6.W))
        val AXI_09_BRESP            = Output(UInt(2.W))
        val AXI_09_BVALID           = Output(UInt(1.W))
        val AXI_09_BREADY           = Input(UInt(1.W))
        val AXI_09_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_09_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_10_ACLK             = Input(Clock())  
        val AXI_10_ARESET_N         = Input(Bool())
        val AXI_10_ARADDR           = Input(UInt(33.W))
        val AXI_10_ARBURST          = Input(UInt(2.W))
        val AXI_10_ARID             = Input(UInt(6.W))
        val AXI_10_ARLEN            = Input(UInt(4.W))
        val AXI_10_ARSIZE           = Input(UInt(3.W))
        val AXI_10_ARVALID          = Input(UInt(1.W))
        val AXI_10_ARREADY          = Output(UInt(1.W))
        val AXI_10_AWADDR           = Input(UInt(33.W))
        val AXI_10_AWBURST          = Input(UInt(2.W))
        val AXI_10_AWID             = Input(UInt(6.W))
        val AXI_10_AWLEN            = Input(UInt(4.W))
        val AXI_10_AWSIZE           = Input(UInt(3.W))
        val AXI_10_AWVALID          = Input(UInt(1.W))
        val AXI_10_AWREADY          = Output(UInt(1.W))
        val AXI_10_WDATA            = Input(UInt(256.W))
        val AXI_10_WLAST            = Input(UInt(1.W))
        val AXI_10_WSTRB            = Input(UInt(32.W))
        val AXI_10_WVALID           = Input(UInt(1.W))
        val AXI_10_WREADY           = Output(UInt(1.W))
        val AXI_10_RDATA            = Output(UInt(256.W))
        val AXI_10_RID              = Output(UInt(6.W))
        val AXI_10_RLAST            = Output(UInt(1.W))
        val AXI_10_RRESP            = Output(UInt(2.W))
        val AXI_10_RVALID           = Output(UInt(1.W))
        val AXI_10_RREADY           = Input(UInt(1.W))
        val AXI_10_BID              = Output(UInt(6.W))
        val AXI_10_BRESP            = Output(UInt(2.W))
        val AXI_10_BVALID           = Output(UInt(1.W))
        val AXI_10_BREADY           = Input(UInt(1.W))
        val AXI_10_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_10_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_11_ACLK             = Input(Clock())  
        val AXI_11_ARESET_N         = Input(Bool())
        val AXI_11_ARADDR           = Input(UInt(33.W))
        val AXI_11_ARBURST          = Input(UInt(2.W))
        val AXI_11_ARID             = Input(UInt(6.W))
        val AXI_11_ARLEN            = Input(UInt(4.W))
        val AXI_11_ARSIZE           = Input(UInt(3.W))
        val AXI_11_ARVALID          = Input(UInt(1.W))
        val AXI_11_ARREADY          = Output(UInt(1.W))
        val AXI_11_AWADDR           = Input(UInt(33.W))
        val AXI_11_AWBURST          = Input(UInt(2.W))
        val AXI_11_AWID             = Input(UInt(6.W))
        val AXI_11_AWLEN            = Input(UInt(4.W))
        val AXI_11_AWSIZE           = Input(UInt(3.W))
        val AXI_11_AWVALID          = Input(UInt(1.W))
        val AXI_11_AWREADY          = Output(UInt(1.W))
        val AXI_11_WDATA            = Input(UInt(256.W))
        val AXI_11_WLAST            = Input(UInt(1.W))
        val AXI_11_WSTRB            = Input(UInt(32.W))
        val AXI_11_WVALID           = Input(UInt(1.W))
        val AXI_11_WREADY           = Output(UInt(1.W))
        val AXI_11_RDATA            = Output(UInt(256.W))
        val AXI_11_RID              = Output(UInt(6.W))
        val AXI_11_RLAST            = Output(UInt(1.W))
        val AXI_11_RRESP            = Output(UInt(2.W))
        val AXI_11_RVALID           = Output(UInt(1.W))
        val AXI_11_RREADY           = Input(UInt(1.W))
        val AXI_11_BID              = Output(UInt(6.W))
        val AXI_11_BRESP            = Output(UInt(2.W))
        val AXI_11_BVALID           = Output(UInt(1.W))
        val AXI_11_BREADY           = Input(UInt(1.W))
        val AXI_11_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_11_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_12_ACLK             = Input(Clock())  
        val AXI_12_ARESET_N         = Input(Bool())
        val AXI_12_ARADDR           = Input(UInt(33.W))
        val AXI_12_ARBURST          = Input(UInt(2.W))
        val AXI_12_ARID             = Input(UInt(6.W))
        val AXI_12_ARLEN            = Input(UInt(4.W))
        val AXI_12_ARSIZE           = Input(UInt(3.W))
        val AXI_12_ARVALID          = Input(UInt(1.W))
        val AXI_12_ARREADY          = Output(UInt(1.W))
        val AXI_12_AWADDR           = Input(UInt(33.W))
        val AXI_12_AWBURST          = Input(UInt(2.W))
        val AXI_12_AWID             = Input(UInt(6.W))
        val AXI_12_AWLEN            = Input(UInt(4.W))
        val AXI_12_AWSIZE           = Input(UInt(3.W))
        val AXI_12_AWVALID          = Input(UInt(1.W))
        val AXI_12_AWREADY          = Output(UInt(1.W))
        val AXI_12_WDATA            = Input(UInt(256.W))
        val AXI_12_WLAST            = Input(UInt(1.W))
        val AXI_12_WSTRB            = Input(UInt(32.W))
        val AXI_12_WVALID           = Input(UInt(1.W))
        val AXI_12_WREADY           = Output(UInt(1.W))
        val AXI_12_RDATA            = Output(UInt(256.W))
        val AXI_12_RID              = Output(UInt(6.W))
        val AXI_12_RLAST            = Output(UInt(1.W))
        val AXI_12_RRESP            = Output(UInt(2.W))
        val AXI_12_RVALID           = Output(UInt(1.W))
        val AXI_12_RREADY           = Input(UInt(1.W))
        val AXI_12_BID              = Output(UInt(6.W))
        val AXI_12_BRESP            = Output(UInt(2.W))
        val AXI_12_BVALID           = Output(UInt(1.W))
        val AXI_12_BREADY           = Input(UInt(1.W))
        val AXI_12_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_12_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_13_ACLK             = Input(Clock())  
        val AXI_13_ARESET_N         = Input(Bool())
        val AXI_13_ARADDR           = Input(UInt(33.W))
        val AXI_13_ARBURST          = Input(UInt(2.W))
        val AXI_13_ARID             = Input(UInt(6.W))
        val AXI_13_ARLEN            = Input(UInt(4.W))
        val AXI_13_ARSIZE           = Input(UInt(3.W))
        val AXI_13_ARVALID          = Input(UInt(1.W))
        val AXI_13_ARREADY          = Output(UInt(1.W))
        val AXI_13_AWADDR           = Input(UInt(33.W))
        val AXI_13_AWBURST          = Input(UInt(2.W))
        val AXI_13_AWID             = Input(UInt(6.W))
        val AXI_13_AWLEN            = Input(UInt(4.W))
        val AXI_13_AWSIZE           = Input(UInt(3.W))
        val AXI_13_AWVALID          = Input(UInt(1.W))
        val AXI_13_AWREADY          = Output(UInt(1.W))
        val AXI_13_WDATA            = Input(UInt(256.W))
        val AXI_13_WLAST            = Input(UInt(1.W))
        val AXI_13_WSTRB            = Input(UInt(32.W))
        val AXI_13_WVALID           = Input(UInt(1.W))
        val AXI_13_WREADY           = Output(UInt(1.W))
        val AXI_13_RDATA            = Output(UInt(256.W))
        val AXI_13_RID              = Output(UInt(6.W))
        val AXI_13_RLAST            = Output(UInt(1.W))
        val AXI_13_RRESP            = Output(UInt(2.W))
        val AXI_13_RVALID           = Output(UInt(1.W))
        val AXI_13_RREADY           = Input(UInt(1.W))
        val AXI_13_BID              = Output(UInt(6.W))
        val AXI_13_BRESP            = Output(UInt(2.W))
        val AXI_13_BVALID           = Output(UInt(1.W))
        val AXI_13_BREADY           = Input(UInt(1.W))
        val AXI_13_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_13_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_14_ACLK             = Input(Clock())  
        val AXI_14_ARESET_N         = Input(Bool())
        val AXI_14_ARADDR           = Input(UInt(33.W))
        val AXI_14_ARBURST          = Input(UInt(2.W))
        val AXI_14_ARID             = Input(UInt(6.W))
        val AXI_14_ARLEN            = Input(UInt(4.W))
        val AXI_14_ARSIZE           = Input(UInt(3.W))
        val AXI_14_ARVALID          = Input(UInt(1.W))
        val AXI_14_ARREADY          = Output(UInt(1.W))
        val AXI_14_AWADDR           = Input(UInt(33.W))
        val AXI_14_AWBURST          = Input(UInt(2.W))
        val AXI_14_AWID             = Input(UInt(6.W))
        val AXI_14_AWLEN            = Input(UInt(4.W))
        val AXI_14_AWSIZE           = Input(UInt(3.W))
        val AXI_14_AWVALID          = Input(UInt(1.W))
        val AXI_14_AWREADY          = Output(UInt(1.W))
        val AXI_14_WDATA            = Input(UInt(256.W))
        val AXI_14_WLAST            = Input(UInt(1.W))
        val AXI_14_WSTRB            = Input(UInt(32.W))
        val AXI_14_WVALID           = Input(UInt(1.W))
        val AXI_14_WREADY           = Output(UInt(1.W))
        val AXI_14_RDATA            = Output(UInt(256.W))
        val AXI_14_RID              = Output(UInt(6.W))
        val AXI_14_RLAST            = Output(UInt(1.W))
        val AXI_14_RRESP            = Output(UInt(2.W))
        val AXI_14_RVALID           = Output(UInt(1.W))
        val AXI_14_RREADY           = Input(UInt(1.W))
        val AXI_14_BID              = Output(UInt(6.W))
        val AXI_14_BRESP            = Output(UInt(2.W))
        val AXI_14_BVALID           = Output(UInt(1.W))
        val AXI_14_BREADY           = Input(UInt(1.W))
        val AXI_14_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_14_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_15_ACLK             = Input(Clock())  
        val AXI_15_ARESET_N         = Input(Bool())
        val AXI_15_ARADDR           = Input(UInt(33.W))
        val AXI_15_ARBURST          = Input(UInt(2.W))
        val AXI_15_ARID             = Input(UInt(6.W))
        val AXI_15_ARLEN            = Input(UInt(4.W))
        val AXI_15_ARSIZE           = Input(UInt(3.W))
        val AXI_15_ARVALID          = Input(UInt(1.W))
        val AXI_15_ARREADY          = Output(UInt(1.W))
        val AXI_15_AWADDR           = Input(UInt(33.W))
        val AXI_15_AWBURST          = Input(UInt(2.W))
        val AXI_15_AWID             = Input(UInt(6.W))
        val AXI_15_AWLEN            = Input(UInt(4.W))
        val AXI_15_AWSIZE           = Input(UInt(3.W))
        val AXI_15_AWVALID          = Input(UInt(1.W))
        val AXI_15_AWREADY          = Output(UInt(1.W))
        val AXI_15_WDATA            = Input(UInt(256.W))
        val AXI_15_WLAST            = Input(UInt(1.W))
        val AXI_15_WSTRB            = Input(UInt(32.W))
        val AXI_15_WVALID           = Input(UInt(1.W))
        val AXI_15_WREADY           = Output(UInt(1.W))
        val AXI_15_RDATA            = Output(UInt(256.W))
        val AXI_15_RID              = Output(UInt(6.W))
        val AXI_15_RLAST            = Output(UInt(1.W))
        val AXI_15_RRESP            = Output(UInt(2.W))
        val AXI_15_RVALID           = Output(UInt(1.W))
        val AXI_15_RREADY           = Input(UInt(1.W))
        val AXI_15_BID              = Output(UInt(6.W))
        val AXI_15_BRESP            = Output(UInt(2.W))
        val AXI_15_BVALID           = Output(UInt(1.W))
        val AXI_15_BREADY           = Input(UInt(1.W))
        val AXI_15_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_15_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_16_ACLK             = Input(Clock())  
        val AXI_16_ARESET_N         = Input(Bool())
        val AXI_16_ARADDR           = Input(UInt(33.W))
        val AXI_16_ARBURST          = Input(UInt(2.W))
        val AXI_16_ARID             = Input(UInt(6.W))
        val AXI_16_ARLEN            = Input(UInt(4.W))
        val AXI_16_ARSIZE           = Input(UInt(3.W))
        val AXI_16_ARVALID          = Input(UInt(1.W))
        val AXI_16_ARREADY          = Output(UInt(1.W))
        val AXI_16_AWADDR           = Input(UInt(33.W))
        val AXI_16_AWBURST          = Input(UInt(2.W))
        val AXI_16_AWID             = Input(UInt(6.W))
        val AXI_16_AWLEN            = Input(UInt(4.W))
        val AXI_16_AWSIZE           = Input(UInt(3.W))
        val AXI_16_AWVALID          = Input(UInt(1.W))
        val AXI_16_AWREADY          = Output(UInt(1.W))
        val AXI_16_WDATA            = Input(UInt(256.W))
        val AXI_16_WLAST            = Input(UInt(1.W))
        val AXI_16_WSTRB            = Input(UInt(32.W))
        val AXI_16_WVALID           = Input(UInt(1.W))
        val AXI_16_WREADY           = Output(UInt(1.W))
        val AXI_16_RDATA            = Output(UInt(256.W))
        val AXI_16_RID              = Output(UInt(6.W))
        val AXI_16_RLAST            = Output(UInt(1.W))
        val AXI_16_RRESP            = Output(UInt(2.W))
        val AXI_16_RVALID           = Output(UInt(1.W))
        val AXI_16_RREADY           = Input(UInt(1.W))
        val AXI_16_BID              = Output(UInt(6.W))
        val AXI_16_BRESP            = Output(UInt(2.W))
        val AXI_16_BVALID           = Output(UInt(1.W))
        val AXI_16_BREADY           = Input(UInt(1.W))
        val AXI_16_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_16_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_17_ACLK             = Input(Clock())  
        val AXI_17_ARESET_N         = Input(Bool())
        val AXI_17_ARADDR           = Input(UInt(33.W))
        val AXI_17_ARBURST          = Input(UInt(2.W))
        val AXI_17_ARID             = Input(UInt(6.W))
        val AXI_17_ARLEN            = Input(UInt(4.W))
        val AXI_17_ARSIZE           = Input(UInt(3.W))
        val AXI_17_ARVALID          = Input(UInt(1.W))
        val AXI_17_ARREADY          = Output(UInt(1.W))
        val AXI_17_AWADDR           = Input(UInt(33.W))
        val AXI_17_AWBURST          = Input(UInt(2.W))
        val AXI_17_AWID             = Input(UInt(6.W))
        val AXI_17_AWLEN            = Input(UInt(4.W))
        val AXI_17_AWSIZE           = Input(UInt(3.W))
        val AXI_17_AWVALID          = Input(UInt(1.W))
        val AXI_17_AWREADY          = Output(UInt(1.W))
        val AXI_17_WDATA            = Input(UInt(256.W))
        val AXI_17_WLAST            = Input(UInt(1.W))
        val AXI_17_WSTRB            = Input(UInt(32.W))
        val AXI_17_WVALID           = Input(UInt(1.W))
        val AXI_17_WREADY           = Output(UInt(1.W))
        val AXI_17_RDATA            = Output(UInt(256.W))
        val AXI_17_RID              = Output(UInt(6.W))
        val AXI_17_RLAST            = Output(UInt(1.W))
        val AXI_17_RRESP            = Output(UInt(2.W))
        val AXI_17_RVALID           = Output(UInt(1.W))
        val AXI_17_RREADY           = Input(UInt(1.W))
        val AXI_17_BID              = Output(UInt(6.W))
        val AXI_17_BRESP            = Output(UInt(2.W))
        val AXI_17_BVALID           = Output(UInt(1.W))
        val AXI_17_BREADY           = Input(UInt(1.W))
        val AXI_17_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_17_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_18_ACLK             = Input(Clock())  
        val AXI_18_ARESET_N         = Input(Bool())
        val AXI_18_ARADDR           = Input(UInt(33.W))
        val AXI_18_ARBURST          = Input(UInt(2.W))
        val AXI_18_ARID             = Input(UInt(6.W))
        val AXI_18_ARLEN            = Input(UInt(4.W))
        val AXI_18_ARSIZE           = Input(UInt(3.W))
        val AXI_18_ARVALID          = Input(UInt(1.W))
        val AXI_18_ARREADY          = Output(UInt(1.W))
        val AXI_18_AWADDR           = Input(UInt(33.W))
        val AXI_18_AWBURST          = Input(UInt(2.W))
        val AXI_18_AWID             = Input(UInt(6.W))
        val AXI_18_AWLEN            = Input(UInt(4.W))
        val AXI_18_AWSIZE           = Input(UInt(3.W))
        val AXI_18_AWVALID          = Input(UInt(1.W))
        val AXI_18_AWREADY          = Output(UInt(1.W))
        val AXI_18_WDATA            = Input(UInt(256.W))
        val AXI_18_WLAST            = Input(UInt(1.W))
        val AXI_18_WSTRB            = Input(UInt(32.W))
        val AXI_18_WVALID           = Input(UInt(1.W))
        val AXI_18_WREADY           = Output(UInt(1.W))
        val AXI_18_RDATA            = Output(UInt(256.W))
        val AXI_18_RID              = Output(UInt(6.W))
        val AXI_18_RLAST            = Output(UInt(1.W))
        val AXI_18_RRESP            = Output(UInt(2.W))
        val AXI_18_RVALID           = Output(UInt(1.W))
        val AXI_18_RREADY           = Input(UInt(1.W))
        val AXI_18_BID              = Output(UInt(6.W))
        val AXI_18_BRESP            = Output(UInt(2.W))
        val AXI_18_BVALID           = Output(UInt(1.W))
        val AXI_18_BREADY           = Input(UInt(1.W))
        val AXI_18_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_18_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_19_ACLK             = Input(Clock())  
        val AXI_19_ARESET_N         = Input(Bool())
        val AXI_19_ARADDR           = Input(UInt(33.W))
        val AXI_19_ARBURST          = Input(UInt(2.W))
        val AXI_19_ARID             = Input(UInt(6.W))
        val AXI_19_ARLEN            = Input(UInt(4.W))
        val AXI_19_ARSIZE           = Input(UInt(3.W))
        val AXI_19_ARVALID          = Input(UInt(1.W))
        val AXI_19_ARREADY          = Output(UInt(1.W))
        val AXI_19_AWADDR           = Input(UInt(33.W))
        val AXI_19_AWBURST          = Input(UInt(2.W))
        val AXI_19_AWID             = Input(UInt(6.W))
        val AXI_19_AWLEN            = Input(UInt(4.W))
        val AXI_19_AWSIZE           = Input(UInt(3.W))
        val AXI_19_AWVALID          = Input(UInt(1.W))
        val AXI_19_AWREADY          = Output(UInt(1.W))
        val AXI_19_WDATA            = Input(UInt(256.W))
        val AXI_19_WLAST            = Input(UInt(1.W))
        val AXI_19_WSTRB            = Input(UInt(32.W))
        val AXI_19_WVALID           = Input(UInt(1.W))
        val AXI_19_WREADY           = Output(UInt(1.W))
        val AXI_19_RDATA            = Output(UInt(256.W))
        val AXI_19_RID              = Output(UInt(6.W))
        val AXI_19_RLAST            = Output(UInt(1.W))
        val AXI_19_RRESP            = Output(UInt(2.W))
        val AXI_19_RVALID           = Output(UInt(1.W))
        val AXI_19_RREADY           = Input(UInt(1.W))
        val AXI_19_BID              = Output(UInt(6.W))
        val AXI_19_BRESP            = Output(UInt(2.W))
        val AXI_19_BVALID           = Output(UInt(1.W))
        val AXI_19_BREADY           = Input(UInt(1.W))
        val AXI_19_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_19_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_20_ACLK             = Input(Clock())  
        val AXI_20_ARESET_N         = Input(Bool())
        val AXI_20_ARADDR           = Input(UInt(33.W))
        val AXI_20_ARBURST          = Input(UInt(2.W))
        val AXI_20_ARID             = Input(UInt(6.W))
        val AXI_20_ARLEN            = Input(UInt(4.W))
        val AXI_20_ARSIZE           = Input(UInt(3.W))
        val AXI_20_ARVALID          = Input(UInt(1.W))
        val AXI_20_ARREADY          = Output(UInt(1.W))
        val AXI_20_AWADDR           = Input(UInt(33.W))
        val AXI_20_AWBURST          = Input(UInt(2.W))
        val AXI_20_AWID             = Input(UInt(6.W))
        val AXI_20_AWLEN            = Input(UInt(4.W))
        val AXI_20_AWSIZE           = Input(UInt(3.W))
        val AXI_20_AWVALID          = Input(UInt(1.W))
        val AXI_20_AWREADY          = Output(UInt(1.W))
        val AXI_20_WDATA            = Input(UInt(256.W))
        val AXI_20_WLAST            = Input(UInt(1.W))
        val AXI_20_WSTRB            = Input(UInt(32.W))
        val AXI_20_WVALID           = Input(UInt(1.W))
        val AXI_20_WREADY           = Output(UInt(1.W))
        val AXI_20_RDATA            = Output(UInt(256.W))
        val AXI_20_RID              = Output(UInt(6.W))
        val AXI_20_RLAST            = Output(UInt(1.W))
        val AXI_20_RRESP            = Output(UInt(2.W))
        val AXI_20_RVALID           = Output(UInt(1.W))
        val AXI_20_RREADY           = Input(UInt(1.W))
        val AXI_20_BID              = Output(UInt(6.W))
        val AXI_20_BRESP            = Output(UInt(2.W))
        val AXI_20_BVALID           = Output(UInt(1.W))
        val AXI_20_BREADY           = Input(UInt(1.W))
        val AXI_20_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_20_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_21_ACLK             = Input(Clock())  
        val AXI_21_ARESET_N         = Input(Bool())
        val AXI_21_ARADDR           = Input(UInt(33.W))
        val AXI_21_ARBURST          = Input(UInt(2.W))
        val AXI_21_ARID             = Input(UInt(6.W))
        val AXI_21_ARLEN            = Input(UInt(4.W))
        val AXI_21_ARSIZE           = Input(UInt(3.W))
        val AXI_21_ARVALID          = Input(UInt(1.W))
        val AXI_21_ARREADY          = Output(UInt(1.W))
        val AXI_21_AWADDR           = Input(UInt(33.W))
        val AXI_21_AWBURST          = Input(UInt(2.W))
        val AXI_21_AWID             = Input(UInt(6.W))
        val AXI_21_AWLEN            = Input(UInt(4.W))
        val AXI_21_AWSIZE           = Input(UInt(3.W))
        val AXI_21_AWVALID          = Input(UInt(1.W))
        val AXI_21_AWREADY          = Output(UInt(1.W))
        val AXI_21_WDATA            = Input(UInt(256.W))
        val AXI_21_WLAST            = Input(UInt(1.W))
        val AXI_21_WSTRB            = Input(UInt(32.W))
        val AXI_21_WVALID           = Input(UInt(1.W))
        val AXI_21_WREADY           = Output(UInt(1.W))
        val AXI_21_RDATA            = Output(UInt(256.W))
        val AXI_21_RID              = Output(UInt(6.W))
        val AXI_21_RLAST            = Output(UInt(1.W))
        val AXI_21_RRESP            = Output(UInt(2.W))
        val AXI_21_RVALID           = Output(UInt(1.W))
        val AXI_21_RREADY           = Input(UInt(1.W))
        val AXI_21_BID              = Output(UInt(6.W))
        val AXI_21_BRESP            = Output(UInt(2.W))
        val AXI_21_BVALID           = Output(UInt(1.W))
        val AXI_21_BREADY           = Input(UInt(1.W))
        val AXI_21_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_21_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_22_ACLK             = Input(Clock())  
        val AXI_22_ARESET_N         = Input(Bool())
        val AXI_22_ARADDR           = Input(UInt(33.W))
        val AXI_22_ARBURST          = Input(UInt(2.W))
        val AXI_22_ARID             = Input(UInt(6.W))
        val AXI_22_ARLEN            = Input(UInt(4.W))
        val AXI_22_ARSIZE           = Input(UInt(3.W))
        val AXI_22_ARVALID          = Input(UInt(1.W))
        val AXI_22_ARREADY          = Output(UInt(1.W))
        val AXI_22_AWADDR           = Input(UInt(33.W))
        val AXI_22_AWBURST          = Input(UInt(2.W))
        val AXI_22_AWID             = Input(UInt(6.W))
        val AXI_22_AWLEN            = Input(UInt(4.W))
        val AXI_22_AWSIZE           = Input(UInt(3.W))
        val AXI_22_AWVALID          = Input(UInt(1.W))
        val AXI_22_AWREADY          = Output(UInt(1.W))
        val AXI_22_WDATA            = Input(UInt(256.W))
        val AXI_22_WLAST            = Input(UInt(1.W))
        val AXI_22_WSTRB            = Input(UInt(32.W))
        val AXI_22_WVALID           = Input(UInt(1.W))
        val AXI_22_WREADY           = Output(UInt(1.W))
        val AXI_22_RDATA            = Output(UInt(256.W))
        val AXI_22_RID              = Output(UInt(6.W))
        val AXI_22_RLAST            = Output(UInt(1.W))
        val AXI_22_RRESP            = Output(UInt(2.W))
        val AXI_22_RVALID           = Output(UInt(1.W))
        val AXI_22_RREADY           = Input(UInt(1.W))
        val AXI_22_BID              = Output(UInt(6.W))
        val AXI_22_BRESP            = Output(UInt(2.W))
        val AXI_22_BVALID           = Output(UInt(1.W))
        val AXI_22_BREADY           = Input(UInt(1.W))
        val AXI_22_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_22_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_23_ACLK             = Input(Clock())  
        val AXI_23_ARESET_N         = Input(Bool())
        val AXI_23_ARADDR           = Input(UInt(33.W))
        val AXI_23_ARBURST          = Input(UInt(2.W))
        val AXI_23_ARID             = Input(UInt(6.W))
        val AXI_23_ARLEN            = Input(UInt(4.W))
        val AXI_23_ARSIZE           = Input(UInt(3.W))
        val AXI_23_ARVALID          = Input(UInt(1.W))
        val AXI_23_ARREADY          = Output(UInt(1.W))
        val AXI_23_AWADDR           = Input(UInt(33.W))
        val AXI_23_AWBURST          = Input(UInt(2.W))
        val AXI_23_AWID             = Input(UInt(6.W))
        val AXI_23_AWLEN            = Input(UInt(4.W))
        val AXI_23_AWSIZE           = Input(UInt(3.W))
        val AXI_23_AWVALID          = Input(UInt(1.W))
        val AXI_23_AWREADY          = Output(UInt(1.W))
        val AXI_23_WDATA            = Input(UInt(256.W))
        val AXI_23_WLAST            = Input(UInt(1.W))
        val AXI_23_WSTRB            = Input(UInt(32.W))
        val AXI_23_WVALID           = Input(UInt(1.W))
        val AXI_23_WREADY           = Output(UInt(1.W))
        val AXI_23_RDATA            = Output(UInt(256.W))
        val AXI_23_RID              = Output(UInt(6.W))
        val AXI_23_RLAST            = Output(UInt(1.W))
        val AXI_23_RRESP            = Output(UInt(2.W))
        val AXI_23_RVALID           = Output(UInt(1.W))
        val AXI_23_RREADY           = Input(UInt(1.W))
        val AXI_23_BID              = Output(UInt(6.W))
        val AXI_23_BRESP            = Output(UInt(2.W))
        val AXI_23_BVALID           = Output(UInt(1.W))
        val AXI_23_BREADY           = Input(UInt(1.W))
        val AXI_23_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_23_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_24_ACLK             = Input(Clock())  
        val AXI_24_ARESET_N         = Input(Bool())
        val AXI_24_ARADDR           = Input(UInt(33.W))
        val AXI_24_ARBURST          = Input(UInt(2.W))
        val AXI_24_ARID             = Input(UInt(6.W))
        val AXI_24_ARLEN            = Input(UInt(4.W))
        val AXI_24_ARSIZE           = Input(UInt(3.W))
        val AXI_24_ARVALID          = Input(UInt(1.W))
        val AXI_24_ARREADY          = Output(UInt(1.W))
        val AXI_24_AWADDR           = Input(UInt(33.W))
        val AXI_24_AWBURST          = Input(UInt(2.W))
        val AXI_24_AWID             = Input(UInt(6.W))
        val AXI_24_AWLEN            = Input(UInt(4.W))
        val AXI_24_AWSIZE           = Input(UInt(3.W))
        val AXI_24_AWVALID          = Input(UInt(1.W))
        val AXI_24_AWREADY          = Output(UInt(1.W))
        val AXI_24_WDATA            = Input(UInt(256.W))
        val AXI_24_WLAST            = Input(UInt(1.W))
        val AXI_24_WSTRB            = Input(UInt(32.W))
        val AXI_24_WVALID           = Input(UInt(1.W))
        val AXI_24_WREADY           = Output(UInt(1.W))
        val AXI_24_RDATA            = Output(UInt(256.W))
        val AXI_24_RID              = Output(UInt(6.W))
        val AXI_24_RLAST            = Output(UInt(1.W))
        val AXI_24_RRESP            = Output(UInt(2.W))
        val AXI_24_RVALID           = Output(UInt(1.W))
        val AXI_24_RREADY           = Input(UInt(1.W))
        val AXI_24_BID              = Output(UInt(6.W))
        val AXI_24_BRESP            = Output(UInt(2.W))
        val AXI_24_BVALID           = Output(UInt(1.W))
        val AXI_24_BREADY           = Input(UInt(1.W))
        val AXI_24_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_24_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_25_ACLK             = Input(Clock())  
        val AXI_25_ARESET_N         = Input(Bool())
        val AXI_25_ARADDR           = Input(UInt(33.W))
        val AXI_25_ARBURST          = Input(UInt(2.W))
        val AXI_25_ARID             = Input(UInt(6.W))
        val AXI_25_ARLEN            = Input(UInt(4.W))
        val AXI_25_ARSIZE           = Input(UInt(3.W))
        val AXI_25_ARVALID          = Input(UInt(1.W))
        val AXI_25_ARREADY          = Output(UInt(1.W))
        val AXI_25_AWADDR           = Input(UInt(33.W))
        val AXI_25_AWBURST          = Input(UInt(2.W))
        val AXI_25_AWID             = Input(UInt(6.W))
        val AXI_25_AWLEN            = Input(UInt(4.W))
        val AXI_25_AWSIZE           = Input(UInt(3.W))
        val AXI_25_AWVALID          = Input(UInt(1.W))
        val AXI_25_AWREADY          = Output(UInt(1.W))
        val AXI_25_WDATA            = Input(UInt(256.W))
        val AXI_25_WLAST            = Input(UInt(1.W))
        val AXI_25_WSTRB            = Input(UInt(32.W))
        val AXI_25_WVALID           = Input(UInt(1.W))
        val AXI_25_WREADY           = Output(UInt(1.W))
        val AXI_25_RDATA            = Output(UInt(256.W))
        val AXI_25_RID              = Output(UInt(6.W))
        val AXI_25_RLAST            = Output(UInt(1.W))
        val AXI_25_RRESP            = Output(UInt(2.W))
        val AXI_25_RVALID           = Output(UInt(1.W))
        val AXI_25_RREADY           = Input(UInt(1.W))
        val AXI_25_BID              = Output(UInt(6.W))
        val AXI_25_BRESP            = Output(UInt(2.W))
        val AXI_25_BVALID           = Output(UInt(1.W))
        val AXI_25_BREADY           = Input(UInt(1.W))
        val AXI_25_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_25_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_26_ACLK             = Input(Clock())  
        val AXI_26_ARESET_N         = Input(Bool())
        val AXI_26_ARADDR           = Input(UInt(33.W))
        val AXI_26_ARBURST          = Input(UInt(2.W))
        val AXI_26_ARID             = Input(UInt(6.W))
        val AXI_26_ARLEN            = Input(UInt(4.W))
        val AXI_26_ARSIZE           = Input(UInt(3.W))
        val AXI_26_ARVALID          = Input(UInt(1.W))
        val AXI_26_ARREADY          = Output(UInt(1.W))
        val AXI_26_AWADDR           = Input(UInt(33.W))
        val AXI_26_AWBURST          = Input(UInt(2.W))
        val AXI_26_AWID             = Input(UInt(6.W))
        val AXI_26_AWLEN            = Input(UInt(4.W))
        val AXI_26_AWSIZE           = Input(UInt(3.W))
        val AXI_26_AWVALID          = Input(UInt(1.W))
        val AXI_26_AWREADY          = Output(UInt(1.W))
        val AXI_26_WDATA            = Input(UInt(256.W))
        val AXI_26_WLAST            = Input(UInt(1.W))
        val AXI_26_WSTRB            = Input(UInt(32.W))
        val AXI_26_WVALID           = Input(UInt(1.W))
        val AXI_26_WREADY           = Output(UInt(1.W))
        val AXI_26_RDATA            = Output(UInt(256.W))
        val AXI_26_RID              = Output(UInt(6.W))
        val AXI_26_RLAST            = Output(UInt(1.W))
        val AXI_26_RRESP            = Output(UInt(2.W))
        val AXI_26_RVALID           = Output(UInt(1.W))
        val AXI_26_RREADY           = Input(UInt(1.W))
        val AXI_26_BID              = Output(UInt(6.W))
        val AXI_26_BRESP            = Output(UInt(2.W))
        val AXI_26_BVALID           = Output(UInt(1.W))
        val AXI_26_BREADY           = Input(UInt(1.W))
        val AXI_26_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_26_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_27_ACLK             = Input(Clock())  
        val AXI_27_ARESET_N         = Input(Bool())
        val AXI_27_ARADDR           = Input(UInt(33.W))
        val AXI_27_ARBURST          = Input(UInt(2.W))
        val AXI_27_ARID             = Input(UInt(6.W))
        val AXI_27_ARLEN            = Input(UInt(4.W))
        val AXI_27_ARSIZE           = Input(UInt(3.W))
        val AXI_27_ARVALID          = Input(UInt(1.W))
        val AXI_27_ARREADY          = Output(UInt(1.W))
        val AXI_27_AWADDR           = Input(UInt(33.W))
        val AXI_27_AWBURST          = Input(UInt(2.W))
        val AXI_27_AWID             = Input(UInt(6.W))
        val AXI_27_AWLEN            = Input(UInt(4.W))
        val AXI_27_AWSIZE           = Input(UInt(3.W))
        val AXI_27_AWVALID          = Input(UInt(1.W))
        val AXI_27_AWREADY          = Output(UInt(1.W))
        val AXI_27_WDATA            = Input(UInt(256.W))
        val AXI_27_WLAST            = Input(UInt(1.W))
        val AXI_27_WSTRB            = Input(UInt(32.W))
        val AXI_27_WVALID           = Input(UInt(1.W))
        val AXI_27_WREADY           = Output(UInt(1.W))
        val AXI_27_RDATA            = Output(UInt(256.W))
        val AXI_27_RID              = Output(UInt(6.W))
        val AXI_27_RLAST            = Output(UInt(1.W))
        val AXI_27_RRESP            = Output(UInt(2.W))
        val AXI_27_RVALID           = Output(UInt(1.W))
        val AXI_27_RREADY           = Input(UInt(1.W))
        val AXI_27_BID              = Output(UInt(6.W))
        val AXI_27_BRESP            = Output(UInt(2.W))
        val AXI_27_BVALID           = Output(UInt(1.W))
        val AXI_27_BREADY           = Input(UInt(1.W))
        val AXI_27_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_27_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_28_ACLK             = Input(Clock())  
        val AXI_28_ARESET_N         = Input(Bool())
        val AXI_28_ARADDR           = Input(UInt(33.W))
        val AXI_28_ARBURST          = Input(UInt(2.W))
        val AXI_28_ARID             = Input(UInt(6.W))
        val AXI_28_ARLEN            = Input(UInt(4.W))
        val AXI_28_ARSIZE           = Input(UInt(3.W))
        val AXI_28_ARVALID          = Input(UInt(1.W))
        val AXI_28_ARREADY          = Output(UInt(1.W))
        val AXI_28_AWADDR           = Input(UInt(33.W))
        val AXI_28_AWBURST          = Input(UInt(2.W))
        val AXI_28_AWID             = Input(UInt(6.W))
        val AXI_28_AWLEN            = Input(UInt(4.W))
        val AXI_28_AWSIZE           = Input(UInt(3.W))
        val AXI_28_AWVALID          = Input(UInt(1.W))
        val AXI_28_AWREADY          = Output(UInt(1.W))
        val AXI_28_WDATA            = Input(UInt(256.W))
        val AXI_28_WLAST            = Input(UInt(1.W))
        val AXI_28_WSTRB            = Input(UInt(32.W))
        val AXI_28_WVALID           = Input(UInt(1.W))
        val AXI_28_WREADY           = Output(UInt(1.W))
        val AXI_28_RDATA            = Output(UInt(256.W))
        val AXI_28_RID              = Output(UInt(6.W))
        val AXI_28_RLAST            = Output(UInt(1.W))
        val AXI_28_RRESP            = Output(UInt(2.W))
        val AXI_28_RVALID           = Output(UInt(1.W))
        val AXI_28_RREADY           = Input(UInt(1.W))
        val AXI_28_BID              = Output(UInt(6.W))
        val AXI_28_BRESP            = Output(UInt(2.W))
        val AXI_28_BVALID           = Output(UInt(1.W))
        val AXI_28_BREADY           = Input(UInt(1.W))
        val AXI_28_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_28_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_29_ACLK             = Input(Clock())  
        val AXI_29_ARESET_N         = Input(Bool())
        val AXI_29_ARADDR           = Input(UInt(33.W))
        val AXI_29_ARBURST          = Input(UInt(2.W))
        val AXI_29_ARID             = Input(UInt(6.W))
        val AXI_29_ARLEN            = Input(UInt(4.W))
        val AXI_29_ARSIZE           = Input(UInt(3.W))
        val AXI_29_ARVALID          = Input(UInt(1.W))
        val AXI_29_ARREADY          = Output(UInt(1.W))
        val AXI_29_AWADDR           = Input(UInt(33.W))
        val AXI_29_AWBURST          = Input(UInt(2.W))
        val AXI_29_AWID             = Input(UInt(6.W))
        val AXI_29_AWLEN            = Input(UInt(4.W))
        val AXI_29_AWSIZE           = Input(UInt(3.W))
        val AXI_29_AWVALID          = Input(UInt(1.W))
        val AXI_29_AWREADY          = Output(UInt(1.W))
        val AXI_29_WDATA            = Input(UInt(256.W))
        val AXI_29_WLAST            = Input(UInt(1.W))
        val AXI_29_WSTRB            = Input(UInt(32.W))
        val AXI_29_WVALID           = Input(UInt(1.W))
        val AXI_29_WREADY           = Output(UInt(1.W))
        val AXI_29_RDATA            = Output(UInt(256.W))
        val AXI_29_RID              = Output(UInt(6.W))
        val AXI_29_RLAST            = Output(UInt(1.W))
        val AXI_29_RRESP            = Output(UInt(2.W))
        val AXI_29_RVALID           = Output(UInt(1.W))
        val AXI_29_RREADY           = Input(UInt(1.W))
        val AXI_29_BID              = Output(UInt(6.W))
        val AXI_29_BRESP            = Output(UInt(2.W))
        val AXI_29_BVALID           = Output(UInt(1.W))
        val AXI_29_BREADY           = Input(UInt(1.W))
        val AXI_29_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_29_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_30_ACLK             = Input(Clock())  
        val AXI_30_ARESET_N         = Input(Bool())
        val AXI_30_ARADDR           = Input(UInt(33.W))
        val AXI_30_ARBURST          = Input(UInt(2.W))
        val AXI_30_ARID             = Input(UInt(6.W))
        val AXI_30_ARLEN            = Input(UInt(4.W))
        val AXI_30_ARSIZE           = Input(UInt(3.W))
        val AXI_30_ARVALID          = Input(UInt(1.W))
        val AXI_30_ARREADY          = Output(UInt(1.W))
        val AXI_30_AWADDR           = Input(UInt(33.W))
        val AXI_30_AWBURST          = Input(UInt(2.W))
        val AXI_30_AWID             = Input(UInt(6.W))
        val AXI_30_AWLEN            = Input(UInt(4.W))
        val AXI_30_AWSIZE           = Input(UInt(3.W))
        val AXI_30_AWVALID          = Input(UInt(1.W))
        val AXI_30_AWREADY          = Output(UInt(1.W))
        val AXI_30_WDATA            = Input(UInt(256.W))
        val AXI_30_WLAST            = Input(UInt(1.W))
        val AXI_30_WSTRB            = Input(UInt(32.W))
        val AXI_30_WVALID           = Input(UInt(1.W))
        val AXI_30_WREADY           = Output(UInt(1.W))
        val AXI_30_RDATA            = Output(UInt(256.W))
        val AXI_30_RID              = Output(UInt(6.W))
        val AXI_30_RLAST            = Output(UInt(1.W))
        val AXI_30_RRESP            = Output(UInt(2.W))
        val AXI_30_RVALID           = Output(UInt(1.W))
        val AXI_30_RREADY           = Input(UInt(1.W))
        val AXI_30_BID              = Output(UInt(6.W))
        val AXI_30_BRESP            = Output(UInt(2.W))
        val AXI_30_BVALID           = Output(UInt(1.W))
        val AXI_30_BREADY           = Input(UInt(1.W))
        val AXI_30_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_30_RDATA_PARITY     = Output(UInt(32.W))

        val AXI_31_ACLK             = Input(Clock())  
        val AXI_31_ARESET_N         = Input(Bool())
        val AXI_31_ARADDR           = Input(UInt(33.W))
        val AXI_31_ARBURST          = Input(UInt(2.W))
        val AXI_31_ARID             = Input(UInt(6.W))
        val AXI_31_ARLEN            = Input(UInt(4.W))
        val AXI_31_ARSIZE           = Input(UInt(3.W))
        val AXI_31_ARVALID          = Input(UInt(1.W))
        val AXI_31_ARREADY          = Output(UInt(1.W))
        val AXI_31_AWADDR           = Input(UInt(33.W))
        val AXI_31_AWBURST          = Input(UInt(2.W))
        val AXI_31_AWID             = Input(UInt(6.W))
        val AXI_31_AWLEN            = Input(UInt(4.W))
        val AXI_31_AWSIZE           = Input(UInt(3.W))
        val AXI_31_AWVALID          = Input(UInt(1.W))
        val AXI_31_AWREADY          = Output(UInt(1.W))
        val AXI_31_WDATA            = Input(UInt(256.W))
        val AXI_31_WLAST            = Input(UInt(1.W))
        val AXI_31_WSTRB            = Input(UInt(32.W))
        val AXI_31_WVALID           = Input(UInt(1.W))
        val AXI_31_WREADY           = Output(UInt(1.W))
        val AXI_31_RDATA            = Output(UInt(256.W))
        val AXI_31_RID              = Output(UInt(6.W))
        val AXI_31_RLAST            = Output(UInt(1.W))
        val AXI_31_RRESP            = Output(UInt(2.W))
        val AXI_31_RVALID           = Output(UInt(1.W))
        val AXI_31_RREADY           = Input(UInt(1.W))
        val AXI_31_BID              = Output(UInt(6.W))
        val AXI_31_BRESP            = Output(UInt(2.W))
        val AXI_31_BVALID           = Output(UInt(1.W))
        val AXI_31_BREADY           = Input(UInt(1.W))
        val AXI_31_WDATA_PARITY     = Input(UInt(32.W))
        val AXI_31_RDATA_PARITY     = Output(UInt(32.W))

        val APB_0_PWDATA            = Input(UInt(32.W))
        val APB_0_PADDR             = Input(UInt(22.W))
        val APB_0_PCLK              = Input(Clock())
        val APB_0_PENABLE           = Input(UInt(1.W))
        val APB_0_PRESET_N          = Input(Bool())
        val APB_0_PSEL              = Input(UInt(1.W))
        val APB_0_PWRITE            = Input(UInt(1.W))
        val APB_0_PRDATA            = Output(UInt(32.W))
        val APB_0_PREADY            = Output(UInt(1.W))
        val APB_0_PSLVERR           = Output(UInt(1.W))

        val APB_1_PWDATA            = Input(UInt(32.W))
        val APB_1_PADDR             = Input(UInt(22.W))
        val APB_1_PCLK              = Input(Clock())
        val APB_1_PENABLE           = Input(UInt(1.W))
        val APB_1_PRESET_N          = Input(Bool())
        val APB_1_PSEL              = Input(UInt(1.W))
        val APB_1_PWRITE            = Input(UInt(1.W))
        val APB_1_PRDATA            = Output(UInt(32.W))
        val APB_1_PREADY            = Output(UInt(1.W))
        val APB_1_PSLVERR           = Output(UInt(1.W))

        val DRAM_0_STAT_CATTRIP     = Output(UInt(1.W))
        val DRAM_0_STAT_TEMP        = Output(UInt(7.W))
        val DRAM_1_STAT_CATTRIP     = Output(UInt(1.W))
        val DRAM_1_STAT_TEMP        = Output(UInt(7.W))
        val apb_complete_0          = Output(UInt(1.W))
        val apb_complete_1          = Output(UInt(1.W))
    })
}